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測(cè)試工程師 1名 Shenzhen 2024-11-27
Job description:
(1) Independently be responsible for or participate in the index definition, circuit design and simulation verification of analog integrated circuit modules
(2) Responsible for guiding layout engineers to complete the layout design of the designed circuit;
(3) Responsible for chip testing, evaluation and DEBUG after the chip is returned;
(4) Output technical documents such as design, simulation verification, and testing.
Qualifications:
(1) Master's degree or above, microelectronics, integrated circuit and other related majors;
(2) 3-5 years of experience in analog IC design, with experience in power management tape-out preferred;
(3) Have a solid theoretical foundation in analog circuits and be familiar with standard CMOS and BCD processes;
(4) Good communication skills and teamwork spirit.
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- Add: Gonghe Industrial Road, Xixiang Street, Baoan District, Shenzhen City
- Mobile:+86-18300048270
- E-mail:sales@tctek.cn